RTL Source Reference (v002)

This section embeds key SystemVerilog modules from the pccx v002 RTL repository: pccxai/pccx-FPGA-NPU-LLM-kv260.

The RTL is cloned into codes/v002/ at CI build time. Local development requires a manual clone:

git clone https://github.com/pccxai/pccx-FPGA-NPU-LLM-kv260 codes/v002

• ISA Type Package
• NPU Top-Level
• Compute Core Modules
• NPU Controller Modules
• NPU Frontend Modules
• L2 Cache (URAM)
• Memory Dispatch
• PREPROCESS RTL Reference
• Compile-Priority Packages
• Shared Library