Target Models

This section documents how concrete Transformer models are mapped onto pccx v002: the model-level structural choices that matter for the accelerator, the non-standard numerical tricks we have to honor, and how the resulting operator graph breaks down into the five pccx instructions (GEMV, GEMM, MEMCPY, MEMSET, CVO).

The primary reference model is Google Gemma 3N E4B — the model that drove the sizing of GEMV cores, the KV cache budget, and the SFU function list.

Gemma 3N E4B

• Gemma 3N E4B — Overview
  • 1. Model Dimensions
  • 2. What Makes Gemma 3N Non-standard
  • 3. Cross-Layer KV Sharing
  • 4. Datatype Map
  • 5. Where to Go Next
• Gemma 3N E4B — Operator-Level Pipeline
  • 0. Core Function Definitions
  • 1. Token Embedding
  • 2. AltUp Initial Projections
  • 3. PLE Setup (Pre-Compute)
  • 4. Transformer Layer (×35)
  • 5. Decode Logits
  • 6. Generation and Sampling
• Gemma 3N — Attention and RoPE Constraints
  • 1. No Attention Scaling, No Softcap
  • 2. Dynamic Alternating RoPE θ
  • 3. Combined Effect on Tokens per Second
• Gemma 3N — LAuReL and PLE Calibration Modules
  • 1. LAuReL: Parallel Attention Calibration
  • 2. PLE (Per-Layer Embedding): Shadow-Stream Injection
  • 3. Why These Details Matter
• Gemma 3N — FFN Gaussian Top-K Sparsity
  • 1. What the Rule Does
  • 2. Why It’s Done This Way
  • 3. Pipeline View
  • 4. Mapping onto pccx v002
  • 5. Throughput Impact
• Gemma 3N E4B on pccx v002 — Execution and Scheduling
  • 1. Memory Layout at Steady State
  • 2. Host Setup (Once, at Model Load)
  • 3. Per-Token Decode Flow
  • 4. KV Cache Management
  • 5. Error and Completion Handling
  • 6. Performance Budget (Target)

Note

The host-side application that drives this pipeline lives in the FPGA repo as a submodule, sw/gemma3NE4B/ → hkimw/llm-lite. It serves both as the golden CPU reference for verification and as the stimulus generator for the xsim testbench suite.