pccx-lab
========

Pre-RTL bottleneck detection, UVM co-simulation, and LLM-driven testbench generation — purpose-built for the pccx NPU architecture.

.. toctree::
   :maxdepth: 2
   :hidden:

   getting-started
   modules/overview
   modules/node-editor
   design/rationale
   design/phase1_crate_split
   design/phase2_intellisense
   design/phase3_remote_backend
   design/phase4_insane_reports
   design/phase5_alphaevolve
   design/phase6_dev_docs_generation
   pccx-format
   verification-workflow

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   :margin: 3
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   .. grid-item-card:: Back to pccx main docs
      :link: https://pccxai.github.io/pccx/en/